rushilwiz/lab-04-Rushilwiz
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finished lab

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This commit is contained in:
Rushil Umaretiya 2024-03-22 17:20:01 -04:00
parent 84026e42a5
commit f1740fd228
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GPG Key ID: 4E8FAF9C926AF959
3 changed files with 67 additions and 11 deletions
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25
instructions.c
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@ -1,4 +1,4 @@
// PID: 730677144 // PID: 730677144
// I pledge the COMP 211 honor code. // I pledge the COMP 211 honor code.
#include <stdint.h> #include <stdint.h>
@ -16,7 +16,7 @@
// Return: instruction_type: R_TYPE or I_TYPE (see structures) // Return: instruction_type: R_TYPE or I_TYPE (see structures)
// //
instruction_type get_type_of_instruction(uint32_t instruct) { instruction_type get_type_of_instruction(uint32_t instruct) {
if (bit_select(instruct, 26, 32) == 0) { if (bit_select(instruct, OPCODE_START_BIT, OPCODE_END_BIT) == 0) {
return R_TYPE; return R_TYPE;
} else { } else {
return I_TYPE; return I_TYPE;
@ -35,8 +35,15 @@ instruction_type get_type_of_instruction(uint32_t instruct) {
// you will have to set: rs, rt, rd, shamt, func // you will have to set: rs, rt, rd, shamt, func
// //
r_instruction* create_r_instruction(uint32_t instruct) { r_instruction* create_r_instruction(uint32_t instruct) {
// TODO r_instruction* r = malloc(sizeof(r_instruction));
return NULL;
r->rs = bit_select(instruct, RS_START_BIT, RS_END_BIT);
r->rt = bit_select(instruct, RT_START_BIT, RT_END_BIT);
r->rd = bit_select(instruct, RD_START_BIT, RD_END_BIT);
r->shamt = bit_select(instruct, SHAMT_START_BIT, SHAMT_END_BIT);
r->func = bit_select(instruct, FUNC_START_BIT, FUNC_END_BIT);
return r;
} // end create_r_instruction() function } // end create_r_instruction() function
// ------------------------------------ // ------------------------------------
@ -50,6 +57,12 @@ r_instruction* create_r_instruction(uint32_t instruct) {
// you will have to set: opcode, rs, rt, immediate // you will have to set: opcode, rs, rt, immediate
// //
i_instruction* create_i_instruction(uint32_t instruct) { i_instruction* create_i_instruction(uint32_t instruct) {
// TODO i_instruction* i = malloc(sizeof(i_instruction));
return NULL;
i->opcode = bit_select(instruct, OPCODE_START_BIT, OPCODE_END_BIT);
i->rs = bit_select(instruct, RS_START_BIT, RS_END_BIT);
i->rt = bit_select(instruct, RT_START_BIT, RT_END_BIT);
i->immediate = bit_select(instruct, IMMEDIATE_START_BIT, IMMEDIATE_END_BIT);
return i;
} // end create_i_instruction() function } // end create_i_instruction() function

BIN
lab04
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53
lab04.c
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@ -1,4 +1,4 @@
// PID: 730677144 // PID: 730677144
// I pledge the COMP 211 honor code. // I pledge the COMP 211 honor code.
#include <limits.h> #include <limits.h>
@ -32,12 +32,10 @@ int main() {
return EXIT_SUCCESS; return EXIT_SUCCESS;
if (get_type_of_instruction(instruct) == R_TYPE) { if (get_type_of_instruction(instruct) == R_TYPE) {
printf("R_TYPE instruction\n");
r_instruction* r_instruct = create_r_instruction(instruct); r_instruction* r_instruct = create_r_instruction(instruct);
execute_r_instruction(r_instruct); execute_r_instruction(r_instruct);
free(r_instruct); free(r_instruct);
} else { // I_TYPE } else { // I_TYPE
printf("I_TYPE instruction\n");
i_instruction* i_instruct = create_i_instruction(instruct); i_instruction* i_instruct = create_i_instruction(instruct);
execute_i_instruction(i_instruct); execute_i_instruction(i_instruct);
free(i_instruct); free(i_instruct);
@ -72,7 +70,36 @@ int main() {
// Return: None // Return: None
// //
void execute_r_instruction(r_instruction* instruct) { void execute_r_instruction(r_instruction* instruct) {
// TODO switch (instruct->func) {
case SLL_FUNC:
registers[instruct->rd] = registers[instruct->rt]
<< instruct->shamt;
break;
case SRA_FUNC:
registers[instruct->rd] =
registers[instruct->rt] >> instruct->shamt;
break;
case ADD_FUNC:
registers[instruct->rd] =
registers[instruct->rs] + registers[instruct->rt];
break;
case SUB_FUNC:
registers[instruct->rd] =
registers[instruct->rs] - registers[instruct->rt];
break;
case AND_FUNC:
registers[instruct->rd] =
registers[instruct->rs] & registers[instruct->rt];
break;
case OR_FUNC:
registers[instruct->rd] =
registers[instruct->rs] | registers[instruct->rt];
break;
default:
fprintf(stderr, "Invalid function code!\n");
exit(EXIT_FAILURE);
}
} // end execute_r_instruction() function } // end execute_r_instruction() function
// ------------------------------------ // ------------------------------------
@ -89,5 +116,21 @@ void execute_r_instruction(r_instruction* instruct) {
// Return: None // Return: None
// //
void execute_i_instruction(i_instruction* instruct) { void execute_i_instruction(i_instruction* instruct) {
// TODO switch (instruct->opcode) {
case ADDI_OPCODE:
registers[instruct->rt] =
registers[instruct->rs] + instruct->immediate;
break;
case ANDI_OPCODE:
registers[instruct->rt] =
registers[instruct->rs] & instruct->immediate;
break;
case ORI_OPCODE:
registers[instruct->rt] =
registers[instruct->rs] | instruct->immediate;
break;
default:
fprintf(stderr, "Invalid opcode!\n");
exit(EXIT_FAILURE);
}
} // end execute_i_instruction() function } // end execute_i_instruction() function