mirror of
https://github.com/Comp211-SP24/lab-04-Rushilwiz.git
synced 2025-04-03 03:40:20 -04:00
141 lines
4.0 KiB
C
141 lines
4.0 KiB
C
// PID: 730677144
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// I pledge the COMP 211 honor code.
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#include <limits.h>
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#include <stdbool.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include "instructions.h"
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#define REGISTER_SIZE 32
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void execute_r_instruction(r_instruction* instruct);
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void execute_i_instruction(i_instruction* instruct);
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static uint16_t registers[REGISTER_SIZE] = {0};
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int main() {
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uint32_t instruct;
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while (true) {
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printf("Please enter your instruction as a 32-bit integer: ");
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if (scanf("%u", &instruct) != 1) {
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printf("\n");
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fprintf(stderr, "Failed to read instruction!\n");
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return EXIT_FAILURE;
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}
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if (instruct == UINT_MAX)
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return EXIT_SUCCESS;
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if (get_type_of_instruction(instruct) == R_TYPE) {
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r_instruction* r_instruct = create_r_instruction(instruct);
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execute_r_instruction(r_instruct);
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free(r_instruct);
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} else { // I_TYPE
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i_instruction* i_instruct = create_i_instruction(instruct);
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execute_i_instruction(i_instruct);
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free(i_instruct);
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}
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printf("Current register status:\n");
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printf("[");
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for (int i = 0; i < REGISTER_SIZE; i++) {
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printf("%d", registers[i]);
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if (i != REGISTER_SIZE - 1)
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printf(", ");
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}
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printf("]\n");
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}
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}
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// ------------------------------------
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// Takes the r_instruction
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// you created in Part 1 and, based on the MIPS instruction,
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// performs the operation and updates the 'registers' array
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// (see top of file).
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//
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// Hint: the "func" bits determine the operation (i.e., SLL,
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// SRA, ADD, SUB, AND, OR).
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//
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// Arguments: r_instruction structure
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//
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// Return: None
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//
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void execute_r_instruction(r_instruction* instruct) {
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switch (instruct->func) {
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case SLL_FUNC:
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registers[instruct->rd] = registers[instruct->rt]
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<< instruct->shamt;
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break;
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case SRA_FUNC:
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registers[instruct->rd] =
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registers[instruct->rt] >> instruct->shamt;
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break;
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case ADD_FUNC:
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registers[instruct->rd] =
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registers[instruct->rs] + registers[instruct->rt];
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break;
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case SUB_FUNC:
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registers[instruct->rd] =
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registers[instruct->rs] - registers[instruct->rt];
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break;
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case AND_FUNC:
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registers[instruct->rd] =
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registers[instruct->rs] & registers[instruct->rt];
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break;
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case OR_FUNC:
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registers[instruct->rd] =
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registers[instruct->rs] | registers[instruct->rt];
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break;
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case NOR_FUNC:
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registers[instruct->rd] =
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~(registers[instruct->rs] | registers[instruct->rt]);
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break;
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default:
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fprintf(stderr, "Invalid function code!\n");
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exit(EXIT_FAILURE);
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}
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} // end execute_r_instruction() function
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// ------------------------------------
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// Takes the i_instruction
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// you created in Part 1 and, based on the MIPS instruction,
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// performs the operation and updates the 'registers' array
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// (see top of file).
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//
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// Hint: the "opcode" bits determine the operation (.e., ADDI,
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// ANDI, ORI).
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//
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// Arguments: i_instruction structure
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//
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// Return: None
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//
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void execute_i_instruction(i_instruction* instruct) {
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switch (instruct->opcode) {
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case ADDI_OPCODE:
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registers[instruct->rt] =
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registers[instruct->rs] + instruct->immediate;
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break;
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case ANDI_OPCODE:
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registers[instruct->rt] =
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registers[instruct->rs] & instruct->immediate;
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break;
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case ORI_OPCODE:
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registers[instruct->rt] =
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registers[instruct->rs] | instruct->immediate;
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break;
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default:
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fprintf(stderr, "Invalid opcode!\n");
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exit(EXIT_FAILURE);
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}
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} // end execute_i_instruction() function
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