diff --git a/CentralPCB/Central.pretty/RASPBERRYPI4B4GB.kicad_mod b/Central.pretty/RASPBERRYPI4B4GB.kicad_mod similarity index 100% rename from CentralPCB/Central.pretty/RASPBERRYPI4B4GB.kicad_mod rename to Central.pretty/RASPBERRYPI4B4GB.kicad_mod diff --git a/LegPCB/LegPCB-cache.bck b/LegPCB/LegPCB-cache.bck new file mode 100644 index 0000000..5f3ed79 --- /dev/null +++ b/LegPCB/LegPCB-cache.bck @@ -0,0 +1,3 @@ +EESchema-DOCLIB Version 2.0 +# +#End Doc Library diff --git a/LegPCB/LegPCB-cache.dcm b/LegPCB/LegPCB-cache.dcm new file mode 100644 index 0000000..5f3ed79 --- /dev/null +++ b/LegPCB/LegPCB-cache.dcm @@ -0,0 +1,3 @@ +EESchema-DOCLIB Version 2.0 +# +#End Doc Library diff --git a/LegPCB/LegPCB-cache.lib b/LegPCB/LegPCB-cache.lib new file mode 100644 index 0000000..405d39b --- /dev/null +++ b/LegPCB/LegPCB-cache.lib @@ -0,0 +1,18 @@ +EESchema-LIBRARY Version 2.4 +#encoding utf-8 +# +# LegPCB-rescue_XT60-MH-LegPCB +# +DEF LegPCB-rescue_XT60-MH-LegPCB J 0 40 Y Y 1 F N +F0 "J" -50 250 50 H V C CNN +F1 "LegPCB-rescue_XT60-MH-LegPCB" 0 -250 50 H V C CNN +F2 "" -50 250 50 H I C CNN +F3 "" -50 250 50 H I C CNN +DRAW +S -100 200 100 -200 0 1 0 f +X - 1 -300 100 200 R 40 40 1 1 P +X + 2 -300 -100 200 R 40 40 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/LegPCB/LegPCB-rescue.dcm b/LegPCB/LegPCB-rescue.dcm new file mode 100644 index 0000000..5f3ed79 --- /dev/null +++ b/LegPCB/LegPCB-rescue.dcm @@ -0,0 +1,3 @@ +EESchema-DOCLIB Version 2.0 +# +#End Doc Library diff --git a/LegPCB/LegPCB-rescue.lib b/LegPCB/LegPCB-rescue.lib new file mode 100644 index 0000000..64e5a00 --- /dev/null +++ b/LegPCB/LegPCB-rescue.lib @@ -0,0 +1,18 @@ +EESchema-LIBRARY Version 2.4 +#encoding utf-8 +# +# XT60-MH-LegPCB +# +DEF XT60-MH-LegPCB J 0 40 Y Y 1 F N +F0 "J" -50 250 50 H V C CNN +F1 "XT60-MH-LegPCB" 0 -250 50 H V C CNN +F2 "" -50 250 50 H I C CNN +F3 "" -50 250 50 H I C CNN +DRAW +S -100 200 100 -200 0 1 0 f +X - 1 -300 100 200 R 40 40 1 1 P +X + 2 -300 -100 200 R 40 40 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/LegPCB/LegPCB.dcm b/LegPCB/LegPCB.dcm new file mode 100644 index 0000000..5f3ed79 --- /dev/null +++ b/LegPCB/LegPCB.dcm @@ -0,0 +1,3 @@ +EESchema-DOCLIB Version 2.0 +# +#End Doc Library diff --git a/LegPCB/LegPCB.kicad_pcb b/LegPCB/LegPCB.kicad_pcb new file mode 100644 index 0000000..02c8ecb --- /dev/null +++ b/LegPCB/LegPCB.kicad_pcb @@ -0,0 +1 @@ +(kicad_pcb (version 4) (host kicad "dummy file") ) diff --git a/LegPCB/LegPCB.lib b/LegPCB/LegPCB.lib new file mode 100644 index 0000000..2bb09ce --- /dev/null +++ b/LegPCB/LegPCB.lib @@ -0,0 +1,18 @@ +EESchema-LIBRARY Version 2.4 +#encoding utf-8 +# +# XT60-MH +# +DEF XT60-MH J 0 40 Y Y 1 F N +F0 "J" -50 250 50 H V C CNN +F1 "XT60-MH" 0 -250 50 H V C CNN +F2 "" -50 250 50 H I C CNN +F3 "" -50 250 50 H I C CNN +DRAW +S -100 200 100 -200 0 1 0 f +X - 1 -300 100 200 R 40 40 1 1 P +X + 2 -300 -100 200 R 40 40 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/LegPCB/LegPCB.pro b/LegPCB/LegPCB.pro new file mode 100644 index 0000000..152769c --- /dev/null +++ b/LegPCB/LegPCB.pro @@ -0,0 +1,33 @@ +update=22/05/2015 07:44:53 +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] diff --git a/LegPCB/LegPCB.sch b/LegPCB/LegPCB.sch new file mode 100644 index 0000000..bc7a26c --- /dev/null +++ b/LegPCB/LegPCB.sch @@ -0,0 +1,157 @@ +EESchema Schematic File Version 4 +EELAYER 30 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L LegPCB-rescue:XT60-MH-LegPCB B1 +U 1 1 6237939D +P 4500 3250 +F 0 "B1" H 4392 2885 50 0000 C CNN +F 1 "XT60-MH" H 4392 2976 50 0000 C CNN +F 2 "" H 4450 3500 50 0001 C CNN +F 3 "" H 4450 3500 50 0001 C CNN + 1 4500 3250 + -1 0 0 1 +$EndComp +$Comp +L LegPCB-rescue:XT60-MH-LegPCB LA3 +U 1 1 6237BB2D +P 6700 2750 +F 0 "LA3" V 6638 2522 50 0000 R CNN +F 1 "XT60-MH" V 6547 2522 50 0000 R CNN +F 2 "" H 6650 3000 50 0001 C CNN +F 3 "" H 6650 3000 50 0001 C CNN + 1 6700 2750 + 0 -1 -1 0 +$EndComp +$Comp +L LegPCB-rescue:XT60-MH-LegPCB M1 +U 1 1 6237BE1B +P 5250 3750 +F 0 "M1" V 5096 3978 50 0000 L CNN +F 1 "XT60-MH" V 5187 3978 50 0000 L CNN +F 2 "" H 5200 4000 50 0001 C CNN +F 3 "" H 5200 4000 50 0001 C CNN + 1 5250 3750 + 0 1 1 0 +$EndComp +$Comp +L LegPCB-rescue:XT60-MH-LegPCB LA2 +U 1 1 6237B6CA +P 6000 2750 +F 0 "LA2" V 5938 2522 50 0000 R CNN +F 1 "XT60-MH" V 5847 2522 50 0000 R CNN +F 2 "" H 5950 3000 50 0001 C CNN +F 3 "" H 5950 3000 50 0001 C CNN + 1 6000 2750 + 0 -1 -1 0 +$EndComp +$Comp +L LegPCB-rescue:XT60-MH-LegPCB LA1 +U 1 1 6237B32D +P 5250 2750 +F 0 "LA1" V 5188 2522 50 0000 R CNN +F 1 "XT60-MH" V 5097 2522 50 0000 R CNN +F 2 "" H 5200 3000 50 0001 C CNN +F 3 "" H 5200 3000 50 0001 C CNN + 1 5250 2750 + 0 -1 -1 0 +$EndComp +$Comp +L LegPCB-rescue:XT60-MH-LegPCB LA4 +U 1 1 6237B56C +P 6700 3750 +F 0 "LA4" V 6546 3978 50 0000 L CNN +F 1 "XT60-MH" V 6637 3978 50 0000 L CNN +F 2 "" H 6650 4000 50 0001 C CNN +F 3 "" H 6650 4000 50 0001 C CNN + 1 6700 3750 + 0 1 1 0 +$EndComp +$Comp +L LegPCB-rescue:XT60-MH-LegPCB M2 +U 1 1 6237B7DF +P 6000 3750 +F 0 "M2" V 5846 3978 50 0000 L CNN +F 1 "XT60-MH" V 5937 3978 50 0000 L CNN +F 2 "" H 5950 4000 50 0001 C CNN +F 3 "" H 5950 4000 50 0001 C CNN + 1 6000 3750 + 0 1 1 0 +$EndComp +Wire Wire Line + 4800 3150 5150 3150 +Wire Wire Line + 6800 3150 6800 3050 +Wire Wire Line + 6100 3050 6100 3150 +Connection ~ 6100 3150 +Wire Wire Line + 6100 3150 6600 3150 +Wire Wire Line + 5350 3050 5350 3150 +Connection ~ 5350 3150 +Wire Wire Line + 5350 3150 5900 3150 +Wire Wire Line + 5150 3150 5150 3450 +Connection ~ 5150 3150 +Wire Wire Line + 5150 3150 5350 3150 +Wire Wire Line + 5900 3150 5900 3450 +Connection ~ 5900 3150 +Wire Wire Line + 5900 3150 6100 3150 +Wire Wire Line + 6600 3150 6600 3450 +Connection ~ 6600 3150 +Wire Wire Line + 6600 3150 6800 3150 +Wire Wire Line + 4800 3350 5250 3350 +Wire Wire Line + 6800 3350 6800 3450 +Wire Wire Line + 6700 3350 6700 3050 +Wire Wire Line + 6700 3050 6600 3050 +Connection ~ 6700 3350 +Wire Wire Line + 6700 3350 6800 3350 +Wire Wire Line + 6100 3350 6100 3450 +Connection ~ 6100 3350 +Wire Wire Line + 6100 3350 6700 3350 +Wire Wire Line + 5350 3450 5350 3350 +Connection ~ 5350 3350 +Wire Wire Line + 5350 3350 6000 3350 +Wire Wire Line + 5250 3350 5250 3050 +Wire Wire Line + 5250 3050 5150 3050 +Connection ~ 5250 3350 +Wire Wire Line + 5250 3350 5350 3350 +Wire Wire Line + 5900 3050 6000 3050 +Wire Wire Line + 6000 3050 6000 3350 +Connection ~ 6000 3350 +Wire Wire Line + 6000 3350 6100 3350 +$EndSCHEMATC diff --git a/LegPCB/LegPCB.sch-bak b/LegPCB/LegPCB.sch-bak new file mode 100644 index 0000000..1b97caa --- /dev/null +++ b/LegPCB/LegPCB.sch-bak @@ -0,0 +1,157 @@ +EESchema Schematic File Version 4 +EELAYER 30 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L LegPCB:XT60-MH B1 +U 1 1 6237939D +P 4500 3250 +F 0 "B1" H 4392 2885 50 0000 C CNN +F 1 "XT60-MH" H 4392 2976 50 0000 C CNN +F 2 "" H 4450 3500 50 0001 C CNN +F 3 "" H 4450 3500 50 0001 C CNN + 1 4500 3250 + -1 0 0 1 +$EndComp +$Comp +L LegPCB:XT60-MH LA3 +U 1 1 6237BB2D +P 6700 2750 +F 0 "LA3" V 6638 2522 50 0000 R CNN +F 1 "XT60-MH" V 6547 2522 50 0000 R CNN +F 2 "" H 6650 3000 50 0001 C CNN +F 3 "" H 6650 3000 50 0001 C CNN + 1 6700 2750 + 0 -1 -1 0 +$EndComp +$Comp +L LegPCB:XT60-MH M1 +U 1 1 6237BE1B +P 5250 3750 +F 0 "M1" V 5096 3978 50 0000 L CNN +F 1 "XT60-MH" V 5187 3978 50 0000 L CNN +F 2 "" H 5200 4000 50 0001 C CNN +F 3 "" H 5200 4000 50 0001 C CNN + 1 5250 3750 + 0 1 1 0 +$EndComp +$Comp +L LegPCB:XT60-MH LA2 +U 1 1 6237B6CA +P 6000 2750 +F 0 "LA2" V 5938 2522 50 0000 R CNN +F 1 "XT60-MH" V 5847 2522 50 0000 R CNN +F 2 "" H 5950 3000 50 0001 C CNN +F 3 "" H 5950 3000 50 0001 C CNN + 1 6000 2750 + 0 -1 -1 0 +$EndComp +$Comp +L LegPCB:XT60-MH LA1 +U 1 1 6237B32D +P 5250 2750 +F 0 "LA1" V 5188 2522 50 0000 R CNN +F 1 "XT60-MH" V 5097 2522 50 0000 R CNN +F 2 "" H 5200 3000 50 0001 C CNN +F 3 "" H 5200 3000 50 0001 C CNN + 1 5250 2750 + 0 -1 -1 0 +$EndComp +$Comp +L LegPCB:XT60-MH LA4 +U 1 1 6237B56C +P 6700 3750 +F 0 "LA4" V 6546 3978 50 0000 L CNN +F 1 "XT60-MH" V 6637 3978 50 0000 L CNN +F 2 "" H 6650 4000 50 0001 C CNN +F 3 "" H 6650 4000 50 0001 C CNN + 1 6700 3750 + 0 1 1 0 +$EndComp +$Comp +L LegPCB:XT60-MH M2 +U 1 1 6237B7DF +P 6000 3750 +F 0 "M2" V 5846 3978 50 0000 L CNN +F 1 "XT60-MH" V 5937 3978 50 0000 L CNN +F 2 "" H 5950 4000 50 0001 C CNN +F 3 "" H 5950 4000 50 0001 C CNN + 1 6000 3750 + 0 1 1 0 +$EndComp +Wire Wire Line + 4800 3150 5150 3150 +Wire Wire Line + 6800 3150 6800 3050 +Wire Wire Line + 6100 3050 6100 3150 +Connection ~ 6100 3150 +Wire Wire Line + 6100 3150 6600 3150 +Wire Wire Line + 5350 3050 5350 3150 +Connection ~ 5350 3150 +Wire Wire Line + 5350 3150 5900 3150 +Wire Wire Line + 5150 3150 5150 3450 +Connection ~ 5150 3150 +Wire Wire Line + 5150 3150 5350 3150 +Wire Wire Line + 5900 3150 5900 3450 +Connection ~ 5900 3150 +Wire Wire Line + 5900 3150 6100 3150 +Wire Wire Line + 6600 3150 6600 3450 +Connection ~ 6600 3150 +Wire Wire Line + 6600 3150 6800 3150 +Wire Wire Line + 4800 3350 5250 3350 +Wire Wire Line + 6800 3350 6800 3450 +Wire Wire Line + 6700 3350 6700 3050 +Wire Wire Line + 6700 3050 6600 3050 +Connection ~ 6700 3350 +Wire Wire Line + 6700 3350 6800 3350 +Wire Wire Line + 6100 3350 6100 3450 +Connection ~ 6100 3350 +Wire Wire Line + 6100 3350 6700 3350 +Wire Wire Line + 5350 3450 5350 3350 +Connection ~ 5350 3350 +Wire Wire Line + 5350 3350 6000 3350 +Wire Wire Line + 5250 3350 5250 3050 +Wire Wire Line + 5250 3050 5150 3050 +Connection ~ 5250 3350 +Wire Wire Line + 5250 3350 5350 3350 +Wire Wire Line + 5900 3050 6000 3050 +Wire Wire Line + 6000 3050 6000 3350 +Connection ~ 6000 3350 +Wire Wire Line + 6000 3350 6100 3350 +$EndSCHEMATC diff --git a/LegPCB/sym-lib-table b/LegPCB/sym-lib-table new file mode 100644 index 0000000..6f43988 --- /dev/null +++ b/LegPCB/sym-lib-table @@ -0,0 +1,6 @@ +(sym_lib_table + (lib (name Launchbox)(type Legacy)(uri C:/Users/hakun/Documents/GitHub/Caelus/launch-box/Libraries/Launchbox.lib)(options "")(descr "")) + (lib (name Central)(type Legacy)(uri C:/Users/hakun/Documents/GitHub/Potentia/pcb-design/CentralPCB/Central.lib)(options "")(descr "")) + (lib (name CentralPCB-cache)(type Legacy)(uri C:/Users/hakun/Documents/GitHub/Potentia/pcb-design/CentralPCB/CentralPCB-cache.lib)(options "")(descr "")) + (lib (name LegPCB-rescue)(type Legacy)(uri ${KIPRJMOD}/LegPCB-rescue.lib)(options "")(descr "")) +)